Server KIT Signal Integrity Engineer
Guadalajara (Guadalajara) Design / Civil engineering / Industrial engineering
Job description
Job Description
In this position, you will be working with a team of Signal Integrity Engineers to develop the platform interconnect design guidelines for state-of-the-art server platforms, which support the latest Intel Xeon processors.
Your responsibilities will include, but are not limited to:
- Leading interconnect development "KIT" Signal Integrity teams, engaging with Silicon designers, Platform designers, Package designers, AE teams, external customer design teams, etc.
- Electrical modeling and simulation of high speed differential IO interconnects, such as PCIe, ENET, UPI, SATA, and USB.
- Development of package and platform routing guidelines.
- Definition and evaluation of circuit design features required to support interconnect performance requirements.
- Creation of signal measurement test plans and review of measurement results.
- Correlation of measurements to simulations, and modification of models as required.
Inside this Business Group
The Data Center Group (DCG) is at the heart of Intel's transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.
Desired profile
Qualifications
Applicants should possess a Master's Degree in Electrical Engineering, or a Bachelor's Degree with at least 2 years of applicable experience.
Additional desired skills and experience include:
- In-depth understanding of transmission line theory and electromagnetic field concepts.
- Experience in the design and analysis of high-speed digital interconnects, such as PCIE, DDR, ENET, SATA, USB.
- Experience with signal integrity simulation tools, such as HSpice, ADS, SigSim, etc.
- Experience with silicon device modeling methods, such as IBIS_AMI or Verilog-A.
- Experience with 2D and 3D field solver tools, such as XFX, iMap, HFSS, CST, etc.
- Experience in PCB layout review and associated tools, such as Allegro or Mentor
- Experience with lab equipment, such as oscilloscopes, TDRs or VNAs.
- Experience using scripting languages, such as Matlab, Perl or Python.
- Experience in the design of high-speed interconnects, such as PCIE, Fabric, etc.